B.Tech & M.Tech VLSI Project & Internship
Internship in VLSI, Btech & MTech project provides candidate in depth exposure to the VLSI domain. This helps candidate with head start in job search after BTech & MTech completion.
- VLSI Design Flow (Introduction)
- Basic Electronics (Resistor, Capacitor, Current & Voltage)
- Material Physics
- Mosfet Physics
- Digital Circuits & Stick Diagrams
- Linux Comands
- Small Circuits Simulator using Cadence Tool
- How to do Layouts
- Digital Layout Constructions & Verification
- Analog Layout Construction
- Matching
- Shielding
- EMIR
- Antenna
- Latchup
- Short Channel Effects
- IC Fabrication
- Candidates Gets Placement support from this stage
- Project Execution
- PLL (Face lock Loop)
- LDO
- ADC
- DAC (Digital to Analog Controls)
- BGR ( Band Gap Reference)
- Standard Cell Library Construction
- Requirements
- Design specification & architecture
- RTL Coding
- RTL integration
- Functional verification
- Synthesis
- DFT
- Physical Design
- STA
- Custom Layout
- Physical Verification
- Post Silicon Validation
- Combinational logic
- Number systems
- Radix conversions
- K-maps, min-terms, max terms
- Logic gates
- Realization of logic gates using mux’s and universal gates
- Compliments (1/2/9/10’s complement)
- Arithmetic operations using compliments
- Boolean expression minimization, Dmorgan theorems
- POS and SOP
- Conversion and realization
- Adders
- Half adder
- Full adder
- Subtractor
- Half subtractor
- Full subtractor
- Multiplexers
- Realizing bigger Mux’s using smaller Mux’s
- Implementing Adders and subtractors using Multiplexers
- Decoders and Encoders
- Implementing Decoders and Encoders using Mux and Demux
- Bigger Decoder/Encoder using smaller Decoder/Encoder
- Comparators
- Implementing multi bit Comparators using 1-bit Comparator
- Sequential logic
- Latch, Flipflop
- Latch, Flipflop using Gates or Mux’s
- Different types of FFs
- FF Truth table
- Excitation tables
- Realization of FF’s using other FF’s
- Applications of FF’s, Latches
- Counters
- Shift registers
- Synchronizers for clock domain crossing
- FSM’s
- Mealy, Moore FSM
- Different encoding styles
- Frequency dividers
- Frequency multiplication
- STA
- Setup time, Hold time, timing closure
- fixing setup time and hold time violations
- Launch flop, capture flop
- Linux/UNIX OS, Shell
- Working with files, directories
- Commonly used commands
- Basic Passive and Active devices.
- Ohms law, Kirchoff laws
- Basic of circuit understanding
- Transistors in hardware design
- Significance of transistors in hardware design
- Logic gate implementation using BJT, CMOS
- MOSFET functionality
- Semiconductors
- What makes Semiconductor special element?
- Classification of solids into three types
- Conductor, Insulator, Semiconductor
- Energy bands in Solids
- Types of Semiconductors
- Intrinsic Semiconductors
- Extrinsic Semiconductors
- Types of Extrinsic Semiconductors
- N-type Extrinsic Semiconductor
- P-type Extrinsic Semiconductor
- Si, Ge – comparison
- Types of current in Semiconductors – Drift, Diffusion
- ion
- PN Junction dioda
- PN Junction – forward, reverse bias
- V-I Characteristics of PN Junction Diode
- Different types of Diode
- Applications of Diode
- BJT
- BJT
- BJT working principle?
- How BJT can be used for large scale manufacturing
- BJT fabrication steps
- Types of BJT?
- Why BJT is not used in for lower technology nodes?
- Issues with BJT?
- Advantages of BJT?
- NAND gate using BJT?
- Field Effect Transistor : FET
- What is Field Effect Transistor?
- Types of FET
- NMOS
- PMOS
- CMOS
- Fin
- NMOS
- NMOS
- What is NMOS?
- NMOS working principle?
- Different voltages, currents, their equations
- NMOS circuit representation
- How NMOS works like a switch
- How NMOS can be used for large scale manufacturing
- NMOS fabrication steps
- Types of NMOS?
- Why CMOS is used instead of NMOS?
- Issues with NMOS?
- Advantages of NMOS?
- NAND gate using NMOS?
- CMOS
- CMOS
- What is CMOS?
- CMOS working principle?
- Different voltages, currents, their equations
- CMOS circuit representation
- How CMOS works like a switch
- How CMOS can be used for large scale manufacturing
- CMOS fabrication steps
- Types of CMOS?
- Issues with CMOS?
- Advantages of CMOS?
- NAND gate using CMOS?
- CMOS second order effects?
- FinFET
- FinFET
- What is FinFET?
- FinFET working principle?
- Different voltages, currents, their equations
- CMOS circuit representation
- How CMOS works like a switch
- How FinFET can be used for large scale manufacturing
- FinFET fabrication steps
- Types of FinFET?
- Issues with FinFET?
- Advantages of FinFET?
- NAND gate using FinFET?
- Layers of CMOS
- Depositing oxide layer
- Photholithography
- Masking
- Ethching Layers
- Formation of nwell
- Self aligned gate fabrication process
- Diffusion to create n+ and P+ regions
- Metallization
- Mismatches & matching
- Failure mechanisms: Electromigration, IR drop, lod & stress effects, WPE, antenna effects, latch- up, ESD (with high voltage rules, EOS effects)
- Noises & coupling
- Different types of processes – advantages & disadvantages: 1. Planar CMOS
- Full chip construction, scribe seal, pad frame, integration, and guidelines
- Packaging
2. FDSOI
3. SOI
4. BI-CMOS
5. Gallium arsenide
6. Silicon-germanium
7. Finfet
- Design rule checks (DRC)
- Layout versus schematic (LVS)
- Electrical rule checks (ERC)
- Antenna checks
- Latch-up
- Reliability checks like EM and IR analysis
- Design for manufacturability (DFM) checks
- High-speed analog layout
- Handling clocks
- Analog circuits & layout guidelines
- Single & multi-stage differential OP-AMP layout
- Current mirror layout
- PLL, DLL, and oscillators
- Ldo and other regulators
- ADCS & DACS
- Bandgap, temperature sensors & biases: Current & voltage bias lines
- Large drivers
- Input pair, differential routing, power routing, offset minimizing
- Power/signal IR drop
- Cross-talk and coupling
- Electrostatic discharge (ESD)
- Deep sub-micron layout issues
- Shallow trench isolation (STI)
- Well proximity effect (WPE)
- Assignments and multiple hands-on projects
- Best practices & interview questions
- Floor
- Planning
- Schematic
- Layout
- Standard cell layout of digital gates
- Level shifter
- Schmitt trigger
- Single stage OP-AMP
- 4-bit flash ADC
- 4-bit DAC
- Bandgap reference with start-up circuit
- Low drop-out regulator circuit
AND ALSO
- Overview
- Env Setup
- Special Variables
- Data Types
- Variables
- Operators
- Decisions
- Loops
- Arrays, Strings, Lists, Dictionary
- History and Redoing of commands
- String Pattern Matching commands
Course Highlights
- 1-1 Dedicated Mentor Support
- 24/7 Tool Access
- Multiple mock interviews
- Industry Standard Projects
- Support with resume update