Redhawk Training
Redhawk IR drop and power integrity analysis training is a 35 hours program focused on all the aspects of IR drop analysis including static and dynamic vectors.
Course Overview
Redhawk IR drop and power integrity analysis training is a 35 hours program focused on all the aspects of IR drop analysis including static and dynamic vectors.
Redhawk helps create high-performance SoCs which are power efficient and reliable for electro migration, thermal and electrostatic discharge issues. Redhawk is the sign-off solution for all the foundries. Redhawk’s advanced Distributed Machine Processing (DMP) enables significantly higher capacity and better performance for full-chip IR/dynamic voltage drop, power/signal electro migration (EM) and electrostatic discharge (ESD) analyses.
Redhawk training focuses on all the aspects Power integrity, and IR drop analysis.
- Overview of Redhawk and Basics of Power , EM, IR
- Average Power Calculation and Static Analysis
- IP Modelling Techniques in Redhawk
- APL Characterisation
- Dynamic Analysis Vectorless Single Cycle and Multi Cycle Flows
- Dynamic Vectored Analysis
- Redhawk Signal EM
- Low Power Design Analysis
- Setup of Redhawk
Phase#1:
- Overview of Redhawk.
- Labs: Understanding of Input files of Redhawk, Setting up of Redhawk Env.
- Basics of Power, EM, IR.
- Data Preparation of Redhawk- Generation of Collaterals from ICC
- Understanding Volcano Design.
- IP Modelling Techniques.
- Analyzing of APL using utilities Aqua and ACE.
- Sanity Checks of all Inputs Colleterals.
- Grid Weakness Checks, Resistance Extraction.
- Performing PG Resistance Analysis – effective resistance of Instances, Pin Path Resistance Checks
- Missing Vias Checks
- Analysing Shorts
- Disconnected Instances
- Connectivity Checks
- Average Power Calculation
- Static Analysis Theory
- Redhawk Static IR/EM Flow
- Setting Up of GSR for Static Run.
- Creation of Command run file.
- Power Calculation in Static Analysis using Toggle rate.
- Power Calculation in Static Analysis using BPFS.
- Doing experiments with BPFS.
- Exploration of Redhawk TCL Commands for advanced Debugging of IR Drop.
- Creation of Custom lib’s for Missing PG Arcs.
- Exploration of Redhawk Explorer.
- Exploration of Power Maps.
- Package and PAD Constraints.
- Results Exploration and Debugging.
- Debugging EM Violations.
- Analyzing Hot spots.
- Analysis Battery Currents and Demands Currents.
- Dynamic Vectorless Analysis
- Redhawk Dynamic Flow
- Setting Up of GSR for Static Run.
- Creation of Command run file.
- Plotting Instance current
- Min, Max, Avg DVD in Timing Window and min DVD in Whole Simulation Cycle.
- Analysis of Switches and its equivalent reports
- Wire IR Drops
- Exploration of DVD Histograms.
- Plotting Instance Voltage Waveform.
- Plotting Switching Histograms.
- Analyzing Switching events
- Decap Density Maps
- Dynamic Voltage Drop Movie.
- Analysis Dynamic Reports
- Design Weakness Checks
- Pad Current Checks
- Decap Efficiency Checks
- Simultaneous Switching Checks
- Frequency Domain based Demand Current Checks
- Voltage Domain based Demand Current Checks
- Cross Probing Violations in Redhawk GUI
- Hotspot Analysis Summary
- DVD Check – Instance Level Debug
- Short Path Tracing of Instances
- Power EM Checks
- Multicycle Vectorless Analysis
- Labs:
- Correlation between Single Cycle and Multicycle analysis
- Cycle based Switching
- All labs on Dynamic Vectorless will be applicable to Multicycle
- Running Redhawk Power IR/EM on Volcano or ORCA_TOP
- Running Redhawk on Power IR/EM Ansys Design.
- Assignments
1. Static EM/IR Analysis.(6hrs)
2. Dynamic EM/IR Vectorless Analysis Single Cycle.(6hrs)
3. Dynamic EM/IR Vectorless Analysis Multi Cycle.(6 hrs)
4. Dynamic Vectored Analysis Worst Power Cycle.(6hrs)
5. Dynamic Vectored Analysis Worst dpdt Cycle.(6 hrs)
6. Signal EM Analysis.(3hrs)
7. Low Power Design Analysis(6 hrs)
- Course presentations for all topics
- Session notes
- Lab documents with detailed steps
- User guides
- Yes
- Student continues to get job support till they find job. No limitation on number of job opportunities provided.
- Good understanding VLSI Technology basics(CMOS, FinFET, etc)
- Digital design concepts
- Each session of course is recorded, missed session videos will be shared
Course Highlights
- 1-1 Dedicated Mentor Support
- 24/7 Tool Access
- Multiple mock interviews
- Industry Standard Projects
- Support with resume update